VHDL, Fourth Edition

This is the fourth version of the VHDL book and this version now not only provides VHDL language coverage but design methodology information as well. This version will guide the reader through the process of creating a VHDL design, simulating the design, synthesizing the design, placing and routing the design, and using VITAL simulation to verify the final result. Also added to this version is a new technique for verifying designs by using real hardware. The design example in this version has been updated to reflect the new focus on the design methodology.

This book also contains a CD with all of the examples used throughout the book so that the reader can simulate or synthesize these examples and understand the book better. The CD also contains loadable versions of the software tools used to simulate and synthesize the examples in the book. These tools can be installed and used to simulate and synthesize the examples in the book to verify the results.

The top level of the CD contains 4 directories. The Exemplar directory contains the Leonardo Spectrum synthesis software used to synthesize the design examples, the Modelsim directory contains the Model Technology Modelsim simulator used to simulate the design examples, the Bridges2Silicon directory contains the AtSpeed Debugging software used for testing with real hardware, and the Examples directory contains all of the examples used in the book.

The last directory at the top level is the Examples directory. This directory contains design examples for chapters 1 to 10. After chapter 10 the only example discussed is the cpu design found in the cpu directory. There is no implied warranty for these examples and they are to be used for instructional purposes only. All of the results obtained from any of the examples were with instructional libraries, therefore the results obtained may or may not reflect the actual tool results.