|
|
|
|
WaveFormer Pro is a revolutionary new
rapid-prototyping EDA tool that helps you design faster and with
fewer mistakes. WaveFormer Pro enables you to automatically
determine critical paths, verify timing margins, adjust for
reconvergent fanout effects, and perform "what if" analysis to
determine optimum clock speed. WaveFormer Pro also lets you specify
and analyze system timing and perform Boolean level simulation
without the need for schematics or simulation models. When your
timing diagram is complete, you can then generate digital stimuli
for your favorite Verilog, VHDL, SPICE or gate-level simulator.
WaveFormer Pro has the ability to import and annotate simulation and
logic analyzer data, for publication quality design
documentation.
"Waveformer Pro has been invaluable to me for
working thru design ideas as well as documenting the design
implementation. One of my recent designs, a Crossbar Switch
Arbiter implemented in an Altera CPLD, was a heavily pipelined
architecture using time division multiplexing. Waveformer Pro was
used to initially brainstorm device operation and to document how
each pipe element worked and would feed the next element in the
pipe. Waveformer Pro has also been used to document system timing
considerations, which have formed the backbone of a 64Gbit router
design. All timing considerations have been included in a waveform
diagram and timing spreadsheet indicating how all router line
cards must implement the back-end design. This diagram will become
the basis of our system design documentation. Waveformer Pro has
been easy to use and exactly the tool that today's design engineer
needs to include as part of one's design
methodology."
Andrew M. Norton
Norton Engineering Consultants
Check out WaveFormer Pro's Feature pages:
Ready to really evaluate? Download the
evaluation version and work through the tutorials:
For registered users only:
Got a question about WaveFormer Pro and HDLs? Post
your question on the newsgroup comp.lang.verilog and it will be
answered by our technical support staff (the newsgroup is checked at
least once a day). You can always call 800-804-7073 to have any
questions answered directly.
|
Would you like a quick walk-through of WaveFormer Pro?
After you download the evaluation version, call 800-804-7073 and ask
for Gary. He will give you a brief tour of WaveFormer Pro and cover
important areas like: drawing waveforms, creating multi-bit buses,
documentation techniques, import and export capabilities, and basic
simulation features. |
Home | Top of Page
Copyright 1999, SynaptiCAD Inc., All rights reserved.
Timing Diagrammer Pro, WaveFormer Pro, TestBencher Pro, VeriLogger
Pro, DataSheet Pro and SynaptiCAD are trademarks of SynaptiCAD, Inc.
All other marks are trademarks of their respective owners.
vhdl verilog SPICE Pspice
timing analysis test bench generation ABEL Minc viewlogic vhdl
verilog vhdl verilog vhdl verilog vhdl
verilog | |